Typically in system-on-chip (SoC) integration, on-chip capacitors occupy substantial silicon real estate, thus it is desirable to reduce the amount of surface area it takes up on the chip. One way to address this problem has been to employ capacitance multiplier circuits on the chip, so that a smaller 1× capacitor can be formed on the chip, but with capacitance multiplication is able to function in a circuit on the chip as a 5× or 10× capacitor, depending on the design requirements for capacitance in the circuit.
Capacitance multipliers can be broadly classified into two basic categories; voltage-based capacitance multipliers such as Miller capacitance multipliers; and current-based capacitance multipliers. A Miller capacitance multiplier, in its basic form, senses a voltage through the capacitor and feeds back a voltage. In a current-based capacitance multiplier, a current through a capacitor is sensed, multiplied and fed back to the filter to raise the effective capacitance.
However, a Miller capacitance multiplier requires adding additional power and circuitry, known as an active capacitor multiplier to an existing circuit, such as a transimpedance amplifier (TIA), for example. This additional circuitry causes the signal to flow through additional nodes which may cause additional poles and zeros affecting the frequency response of the overall amplifier circuit with the additional active capacitor multiplier circuit. Accordingly, this additional circuitry is undesirable on a small chip surface, and the frequency response stability of the overall circuit may be adversely affected.
In a conventional current sensing capacitance multiplier, a circuit senses current through a capacitor and multiplies the current with a resulting increase in the effective capacitance. In a conventional example, the multiplier circuit includes metal oxide semiconductor (MOS) transistor or a bipolar device which forms a current mirror with another MOS transistor or bipolar device, and senses current through an RC filter. In this conventional current sensing capacitance multiplier circuit, the multiplier circuit multiplies the current while mirroring back the current to an input node. However, the transconductance (1/gm) of the MOS transistor that senses the current and that is part of the current mirror in the circuit acts as a series lossy resistor to the capacitor. This resistance must be reduced by having to apply more current to other transistors that make up the circuit. Accordingly, the conventional current sensing capacitance multiplier requires substantial additional power in order to achieve a capacitance multiplier effect.